EtherCAT Distributed Clocks

Configuration:

  • CODESYS V3.5 SP19 Patch 7
  • WAGO Edge Controller 752-8303/8000-0002 FW27
  • Beckhoff EKM1101 EtherCAT Coupler
  • 2 X Beckhoff ELM3002_0205 2-channel analog input

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Are there any examples on using distributed clocks with EtherCAT modules? I have successfully imported the appropriate EtherCAT Slave device repository files and configured an EtherCAT master, EKM1101 EtherCAT Coupler, and Analog Input slices to operate synchronized to the edge controller at a task period of 1.25ms.

Now I am trying to setup oversampling with distributed clocks so that the synch unit cycle is 78.125us (/16) but getting errors and getting stuck transitioning out of PRE-OP mode. I believe it is an issue with my “DC Cyclic Unit Control…” Settings but the wiki is lacking descriptions for these inputs. See attached images of EtherCAT Master log and slave configurations.




The following settings allow for EtherCAT OP-mode but when sampling a 110V 60Hz sine wave it appears that the communication link is interrupted and latches the last valid measurement until communication is restored.


Plot of the average of the 16 oversampled measurements. Shown cursor delta time of 66.386ms

It seems I was running into two different issues in my testing: CPU limits and attempting to operate with a EtherCAT task period that was faster than the cycle time of the installed modules. This caused Rx Frame Count and Frame Lost Count to increment and the EtherCAT CPU load would reach 100%. This is a known limitation with the ARM processor I was using and was functional after increasing the task period from 1.25ms to 5ms. I will be looking into different intel processor controllers that are capable of running faster EtherCAT taskrates.

As for the ELM3002 configuration, it seems that the distributed clock settings do not need to be explicitly configured in the “General” tab. Instead, when selecting the channel number of samples in the “Process Data” tab the device will automatically configure its internal distributed clock accordingly based on the EtherCAT task period (DC_period=ECAT_period/num_samples). If the user attempts to set a DC_period faster than the minimum (100us in the case of ELM3002) then the EtherCAT_Master Log will show an invalid DC Settings message during PreOP.

In addition, it is not explicitly stated in the manual, but in order to reduce the EtherCAT CPU usage and increase the number of oversampling then the “Process Data” must specify the data in Integer format (16b) as opposed to DINT (24b) or real (32b). The measurement linearization must be changed accordingly.

Just an additional hint when setting up EtherCAT on WAGO Controller, make sure you disable Broadcast limitation in the configuration of Ethernet interface in the WBM.

Disabling Broadcast limitation improved results and decreased CPU load slightly but still the 752-8303 multicore was having intermittent Rx Fr losses. CODESYS EtherCAT 4.9.0.0 claims to have some optimization improvements as well. I will test with it next, but still looking towards an intel cpu alternative